Many portable electronic devices, such as cameras, cellular telephones, Personal Digital Assistants (PDAs), MP3 players, computers, and other devices include an imaging device for capturing images. One example of an imaging device is a CMOS imager. A CMOS imager includes a focal plane array of pixels, each pixel including a photosensor, for example, a photodiode, overlying a substrate for producing a photo-generated charge in a doped region of the substrate. In a CMOS imager, the active elements of a pixel, for example a four transistor (4T) pixel, perform the functions of (1) photon to charge conversion; (2) transfer of charge to the floating diffusion region; (3) resetting the floating diffusion region to a known state; (4) selection of a pixel for readout; and (5) output and amplification of a signal representing a reset voltage and a pixel signal voltage based on the photo converted charges. The charge at the floating diffusion region is converted to a pixel or reset output voltage by a source follower output transistor.
Examples of CMOS imagers, processing steps thereof, and detailed descriptions of the functions of various elements of a CMOS imager are described, for example, in U.S. Pat. No. 6,140,630, U.S. Pat. No. 6,376,868, U.S. Pat. No. 6,310,366, U.S. Pat. No. 6,326,652, U.S. Pat. No. 6,204,524, and U.S. Pat. No. 6,333,205, all assigned to Micron Technology, Inc.
Some imagers, however, allow for electronic shuttering. One technique for electronic shuttering is the use of a storage gate in the pixels. When a storage gate is implemented in a pixel design, a storage node is added such that charges accumulated in a photosensor are transferred through the storage gate to a storage node. An example of a pixel incorporating a storage gate is U.S. application Ser. No. 10/721,191, assigned to Micron Technology Inc.
In addition, some imagers include anti-blooming gates. Blooming is caused when too much light enters a pixel and the pixel becomes saturated and unable to hold all of the charge generated by the photosensor. Consequently, the excess photo-generated charge overflows the pixel and contaminates adjacent pixels with electrical crosstalk. The overflow charge from one pixel to the next can create a bright spot or streak in a resultant image, called blooming. Anti-blooming gates bleed off charge from a photosensor to avoid blooming crosstalk of adjacent pixels and the resultant error.
To provide an electronic shutter and alleviate blooming, a pixel has been developed containing an anti-blooming gate and a storage gate. A schematic diagram of such a pixel 10 is illustrated in FIG. 1A. The illustrated pixel 10 includes a photosensor 21 (e.g., photodiode) that is switchably coupled to a storage node 22 by a storage gate transistor 19. A global reset transistor 20 switchably couples the photosensor 21 to the array voltage Vaa. The storage node 22 is switchably coupled to a floating diffusion region FD by a transfer transistor 18. The floating diffusion region FD is further connected to a gate of a source follower transistor 16. A row select transistor 17 selectively couples the source follower transistor 16 to a column line 23. A reset transistor 15 switchably couples the array voltage Vaa to the floating diffusion region FD.
The pixel 10 also includes a global reset line 24 coupled to the gate of the global reset transistor 20 as well as to the gates of other global reset transistors in the respective pixels of an array. A storage gate control line 14 is coupled to the gate of the storage gate transistor 19 as well as to the gates of other storage gate transistors in the respective pixels of an array. A row select line 13 is coupled to the gate of the row select transistor 17. A transfer control line 12 is coupled to the gate of the transfer transistor 18. A reset control line 11 is coupled to the gate of the reset transistor 15. The global reset line 24 carries a global reset control signal GR, storage gate control line 14 carries a storage gate control signal SG, row select line 13 carries a row select signal RS, transfer control line 12 carries a transfer control signal TX and reset control line 11 carries a reset control signal RST.
FIG. 1B shows one possible method of operating the FIG. 1A pixel 10. A global transfer operation is performed on a pixel 10 that has been integrating charge at the photosensor 21. During the global transfer operation, the storage gate control signal SG is activated, transferring the charge accumulated by the photosensor 21 to the storage node 22. A global shutter operation is performed during which the global reset control signal GR is activated, allowing the global reset transistor 20 to reset the photosensor 21 for a next integration period. When the global reset signal GR is inactivated at the end of the global shutter operation, the photosensor 21 begins integration of a new charge that will be processed according to the method of FIG. 1B during the next global transfer operation.
While the photosensor 21 integrates charge for future processing, a pixel array rolling readout operation is performed of the charge already transferred to the storage node 22. The first step in reading out the pixel 10 is activating the row select signal RS. Next, the reset control signal RST is activated to reset the floating diffusion region FD. The reset charge at the floating diffusion region FD is read by the source follower transistor 16. A pixel reset signal Vrst is output by the source follower transistor 16 through row select transistor 17 to column line 23, which routes the signal to sample and hold circuit 29, which samples and holds the pixel reset signal Vrst when the reset sample and hold select signal SHR is activated. Next, the transfer control signal TX is activated transferring the integrated charge from the storage node 22 to the floating diffusion region FD. This charge is output as the photo signal Vsig from the output of the source follower transistor 16 through row select transistor 17 to column line 23. Column line 23 routes the signal to the sample and hold circuit 29, which samples and holds the photo signal Vsig when the pixel signal sample and hold select signal SHS is activated.
Optionally, the global reset signal GR maintains a low positive voltage when inactive, shown by dashed line 51, allowing photosensor 21 to bleed excess charge to the array voltage Vaa to provide an anti-blooming capability. To allow charge bleeding by the photosensor 21, the low positive voltage 51 must be higher than the voltage of the photosensor 21.
With additional lines and transistors, pixels with anti-blooming and/or storage gate transistors require additional metal routing that interferes with an optical path to the photosensor and, therefore, suffer from decreased fill factor and quantum efficiency. Accordingly, there is a desire for a pixel having anti-blooming and/or storage gate functionality with improved fill factor and quantum efficiency.